Memory “refreshes” are the mechanism by which data stored in a Dynamic Random Access Memory (DRAM) is kept alive so that the data stored in the memory does not either degrade or become completely lost. For example, when a conventional computer system is completely shut down and all power is removed, all the data stored in a Memory Module for the computer will eventually become totally useless and irrecoverable. Other Memory Modules that are based on SRAMs do not require refreshes.
Memory refreshes are commonly initiated by an external device, such as a “memory controller” interacting with the memory, in which the memory controller refreshes a portion of the Memory Module as part of, or prior to conducting an operation on the Memory Module, such as a read or write operation. While in active use, a memory controller will also persist with memory “refreshes” as appropriate, so that data stored in the memory does not degrade. When the memory's refreshes are under the control of an external device, such as a memory controller, the memory device simply responds accordingly to directives received from the external device/external memory controller (e.g., the memory will refresh an appropriate portion when directed externally).
A second type of memory “refresh” occurs with such Memory Modules, besides an external refresh or an externally triggered refresh. For example, conventional Memory Modules support a “self refresh” mechanism, in which the refreshes are not initiated by an external device, such as the above memory controller, but rather, such memory refreshes are triggered internally by the Memory Module itself, causing a refresh operation, for example, on each row or rank of the memory in an iterative fashion, over all rows or ranks within the memory.
Memory “self refreshes” are used, for example, when a Memory Module is placed into a low power mode, such as when the memory is not actively being utilized, but the contents of the memory must nevertheless be maintained in an accurate state.
When an external memory controller is managing the memory “refreshes,” the controller itself ensures that the refreshes are timed and staggered appropriately through processing power and appropriate instructions available to the memory controller. However, if a Memory Module is internally iterating through a indefinite period of “self-refresh” (for example, entering a self refresh mode until awoken by an external memory controller at an unknown time in the future), then the Memory Module must itself ensure that all memory rows or ranks are refreshed at a repeating time interval appropriately calculated to ensure that data stored within the memory or Memory Module is not lost, without aid or instruction from the external controller.